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? semiconductor components industries, llc, 2015 march, 2015 ? rev. 1 1 publication order number: ncv4263?2c/d NCV4263-2C 200 ma ldo regulator with enable, reset & watchdog the ncv4263?2c is a 200 ma ldo regulator with integrated reset watchdog functions dedicated for microprocessor applications. its robustness allows ncv4263?2c to be used in severe automotive environments. the enable function can be used for decrease of quiescent current down to max 10 a. the ncv4263?2c contains protection functions as current limit, thermal shutdown and reverse output current protection. the regulator provides also watchdog, reset function with adjustable threshold and adjustable power?on reset delay time. features ? output voltage option: 5 v ? output voltage accuracy: 2% ? output current up to 200 ma ? very low dropout voltage ? enable function (10 a max quiescent current when disabled) ? microprocessor compatible control functions: ? reset with adjustable threshold and adjustable power?on delay ? watchdog function ? wide input voltage operation range: up to 40 v ? protection features: ? current limitation ? thermal shutdown ? reverse output current ? aec?q100 grade 1 qualified and ppap capable ? these are pb?free devices typical applications ? body control module ? instruments and clusters ? occupant protection and comfort ? powertrain ro radj wdi gnd ncv4263?2c microprocessor v in 100 nf c in reset i/o 22 f c out v out v in v dd off on en r ro * 5.6 k d c d 100 nf *?optional if reset function is needed figure 1. application schematic www. onsemi.com ordering information marking diagrams see detailed ordering and shipping information on page 12 o f this data sheet. soic?14 d suffix case 751a 1 14 ncv4263?2c50g awlywwg 1 14 a = assembly location l, wl = wafer lot y = year w, ww = work week g = pb?free package (note: microdot may be in either location) soic?8 ep pd suffix case 751ac 1 8 v632c5 alywx 1 8
ncv4263?2c www. onsemi.com 2 figure 2. simplified block diagram gnd reset generator and watchdog voltage reference en ro wdi d radj enable saturation protection thermal shutdown sp tsd sp tsd v ref v ref v out v in gnd d radj gnd gnd gnd gnd 114 gnd soic?14 nc ro wdi en vout vin figure 3. pin connections (top view) soic?8 ep vin en ro gnd vout wdi radj d 18 pin function description pin no. so?8 ep pin no. so?14 pin name description 1 13 v in positive power supply. connect ceramic capacitor to ground. 2 14 en enable input. low level disables the chip. connect to v in if this function is not needed. 3 1 ro reset output; open collector connected to the v out via an internal 30 k pull?up resistor; leave open if the function is not needed 4 3, 4, 5, 10, 11, 12 gnd power supply ground. connect pins to heat sink area with gnd potential. 5 6 d delaytiming. connect to gnd via ceramic capacitor for adjusting reset delay timing and watchdog trigger time or leave open if this function is not needed. 6 7 radj reset adjust threshold. connect to gnd (v rt = 93% of v out ) or to output voltage divider to adjust the reset threshold. 7 8 wdi watchdog input. rising edge triggered input for watchdog pulses. connect to gnd if this function is not needed. 8 9 v out regulated output voltage. connect a c out 22 f capacitor to ground. epad ? exposed pad connect to ground potential or leave unconnected . ? 2 nc not connected. no internally bonded.
ncv4263?2c www. onsemi.com 3 absolute maximum ratings rating symbol min max unit input voltage (note 1) v in ?42 45 v enable input v en ?42 45 v output voltage v out ?1 7 v reset output voltage v ro ?0.3 7 v watchdog input voltage v wdi ?0.3 7 v reset adjust threshold v radj ?0.3 7 v delay timing output voltage v d ?0.3 7 v maximum junction temperature t j ?40 150 c storage temperature t stg ?55 150 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. refer to electrical characteristics and application information for safe operating area. esd capability (note 2) rating symbol min max unit esd capability, human body model esd hbm ? 2 kv esd capability, charged device model esd cdm ? 1 kv 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec?q100?002 (js?001?2010) esd charged device model tested per aec?q100?011 (eia/jesd22?c101) lead soldering temperature and msl (note 3) rating symbol min max unit moisture sensitivity level soic?14 soic?8 ep msl 1 2 ? lead temperature soldering reflow (smd styles only), pb?free versions t sld ? 265 peak c 3. for more information, please refer to our soldering and mounting techniques reference manual, solderrm/d thermal characteristics rating symbol value unit thermal characteristics, soic?8 exposed pad (note 4) thermal resistance, junction?to?air (note 5) thermal reference, junction?to?pad (note 5) r ja jpad 65.1 8.7 c/w thermal characteristics, soic?14 (note 4) thermal resistance, junction?to?air (note 5) thermal reference, junction?to?pin4 (note 5) r ja jp4 94.8 18.3 c/w 4. refer to electrical characteristics and application information for safe operating area. 5. values based on copper area of 645 mm 2 (or 1 in 2 ) of 1 oz copper thickness and fr4 pcb substrate. operating ranges (note 6) rating symbol min max unit input voltage v in 5.5 40 v junction temperature t j ?40 150 c 6. refer to electrical characteristics and application information for safe operating area.
ncv4263?2c www. onsemi.com 4 electrical characteristics v in = 13.5 v, v en = 5 v, c in = 100 nf, c out = 22 f, esr = 1.5 , wdi = 5 v pulses, f wdi = 1 khz. min and max values are valid for temperature range 40 c t j 150 c unless otherwise noted and are guaranteed by test design or statistical correlation. typical values are referenced to t j = 25 c. (notes 7 and 8) parameter test conditions symbol min typ max unit regulator output output voltage accuracy v in = 6 v to 40 v, i out = 5 to 150 ma v out 4.90 5.0 5.10 v line regulation i out = 150 ma, v in = 6 v to 28 v reg line ?25 3 25 mv load regulation i out = 5 ma to 150 ma reg load ?25 ? 25 mv dropout voltage (note 9) i out = 150 ma v do ? 300 500 mv disable and quiescent currents disable current v en = 0 v,t j < 125 c i dis ? 0.066 10 a quiescent current, i q = i in ? i out i out = 0 ma i out = 150 ma i out = 150 ma, v in = 4.5 v i q ? ? ? 0.275 3 11.3 1.3 18 23 ma current limit protection current limit v out = 0.96 x v out_nom i lim 200 418 500 ma psrr power supply ripple rejection (note 10) f = 100 hz, 0.5 v p?p psrr ? 80 ? db enable enable input threshold voltage logic high logic low v out 0.9 x v out_nom v out 0.1 v v th(en) ? 0.8 2.0 1.74 3.5 ? v enable input current v en = 5 v i en 5 10 25 a watchdog input watchdog input low time c d = 100 nf, v out > v rt , no wdi signal t wl 1 2 3.5 ms watchdog trigger time c d = 100 nf, v out > v rt , no wdi signal t wtt 16 20.8 27 ms delay timing charge current v d = 1 v, no wdi signal i d_charge 40 66.8 95 a discharge current v d = 1 v, no wdi signal i d_disch 4.40 6.54 9.40 a saturation voltage v out < v rt , no wdi signal v d_sat ? 6 100 mv switching threshold upper lower v thh(d) v thl(d) 1.45 0.2 1.70 0.34 2.05 0.55 v reset output output voltage reset threshold (note 11) v out decreasing, v radj = 0 v v rt 90 93 96 % v out reset adjust threshold (70% of v out_nom ) v out < (v rt ) v th(radj) 1.26 1.36 1.44 v reset adjustment range (note 12) v rt_range 70 ? 93 % v out reset output low voltage i ro = 1 ma v rol ? 0.01 0.4 v reset delay time c d = 100 nf t rd 1.3 2.6 4.1 ms product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 7. refer to absolute maximum ratings and application information for safe operating area. 8. performance guaranteed over the indicated operating temperature range by design and/or characterization tested at t a t j . low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 9. measured when output voltage falls 100 mv below the regulated voltage at v in = 13.5 v. 10. values based on design and/or characterization. 11. see application information section for reset threshold adjustment 12. v rt_range limits are guaranteed by v rt and v th(radj) parameters.
ncv4263?2c www. onsemi.com 5 electrical characteristics v in = 13.5 v, v en = 5 v, c in = 100 nf, c out = 22 f, esr = 1.5 , wdi = 5 v pulses, f wdi = 1 khz. min and max values are valid for temperature range 40 c t j 150 c unless otherwise noted and are guaranteed by test design or statistical correlation. typical values are referenced to t j = 25 c. (notes 7 and 8) parameter unit max typ min symbol test conditions reset output reset reaction time c d = 100 nf t rr 0.5 1.2 4 s thermal shutdown thermal shutdown temperature (note 10) i out = 1 ma t sd 150 177 195 c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 7. refer to absolute maximum ratings and application information for safe operating area. 8. performance guaranteed over the indicated operating temperature range by design and/or characterization tested at t a t j . low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 9. measured when output voltage falls 100 mv below the regulated voltage at v in = 13.5 v. 10. values based on design and/or characterization. 11. see application information section for reset threshold adjustment 12. v rt_range limits are guaranteed by v rt and v th(radj) parameters.
ncv4263?2c www. onsemi.com 6 typical characteristics figure 4. quiescent current vs. temperature figure 5. quiescent current vs. input voltage t j , temperature ( c) v in , input voltage (v) 140 100 80 60 20 0 ?20 ?40 0.20 0.22 0.24 0.26 0.28 0.30 0.32 35 30 25 20 15 10 5 0 0 2 4 6 8 10 14 16 figure 6. quiescent current vs. output current figure 7. output voltage accuracy i out , output current (ma) t j , temperature ( c) 250 200 150 100 50 0 0 1 2 4 5 7 9 10 140 100 80 60 20 0 ?20 ?40 4.90 4.92 4.96 4.98 5.00 5.04 5.08 5.10 figure 8. output voltage vs. input voltage figure 9. dropout voltage vs. output current v in , input voltage (v) i out , output current (ma) 6 5 4 3 2 1 0 0 1 2 3 4 5 6 250 200 150 100 50 0 0 100 200 300 400 500 600 i q , quiescent current (ma) i q , quiescent current (ma) i q , quiescent current (ma) v out , output voltage (v) v out , output voltage (v) v do , dropout voltage (mv) 40 120 160 v in = 13.5 v i out = 0 ma v in = 13.5 v t j = 25 c 3 6 8 t j = 25 c r out = 25 t j = 25 c r out = 25 40 12 v in = 13.5 v i out = 5 ma 40 120 160 4.94 5.02 5.06 t j = 150 c t j = 125 c t j = 25 c t j = ?40 c
ncv4263?2c www. onsemi.com 7 typical characteristics figure 10. dropout voltage vs. temperature figure 11. output current limit vs. input voltage t j , temperature ( c) v in , input voltage (v) 140 100 80 60 20 0 ?20 ?40 0 100 200 300 400 500 600 35 30 25 20 15 10 5 0 300 350 400 450 500 550 600 figure 12. output current limit vs. temperature figure 13. output capacitor esr stability region vs. output current t j , temperature ( c) i out , output current (ma) 140 100 80 60 40 0 ?20 ?40 150 200 250 300 400 450 500 550 250 200 150 100 50 0 0.01 0.1 1 10 100 figure 14. psrr vs. frequency figure 15. enable input current vs. temperature frequency (hz) t j , temperature ( c) 100,000 10,000 1000 100 10 30 40 60 70 80 90 110 120 160 140 100 80 20 0 ?20 ?40 0 5 15 20 30 35 40 50 v do , dropout voltage (mv) i lim , output current limit (ma) i lim , output current limit (ma) esr, output capacitor esr ( ) psrr (db) i en , enable input current ( a) 40 120 160 i out = 150 ma 20 120 160 350 v in = 13.5 v v out = 0.96 x v out_nom 50 100 v in = 13.5 v dc + 0.5 v pp ac c out = 22 f, t a = 25 c i out = 100 ma i out = 1 ma 120 40 60 10 25 45 40 t j = 150 c t j = 125 c t j = 25 c t j = ?40 c v out = 0.96 x v out_nom unstable region stable region v in = 13.5 v c out = 22 f t j = 25 c v in = 13.5 v i out = 0 ma v en = 13.5 v v en = 5 v v en = 3.3 v
ncv4263?2c www. onsemi.com 8 typical characteristics v th(radj) , reset adjust threshold (v) figure 16. reset adjust threshold vs. temperature figure 17. reset adjust threshold vs. output voltage t j , temperature ( c) v out , output voltage (v) 140 100 80 60 20 0 ?20 ?40 1.26 1.28 1.32 1.34 1.36 1.38 1.42 1.44 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.26 1.28 1.30 1.34 1.36 1.38 1.42 1.44 figure 18. delay timing switching thresholds vs. temperature figure 19. reset delay charge / discharge current vs. temperature t j , temperature ( c) t j , temperature ( c) 140 120 80 60 40 0 ?20 ?40 0 0.2 0.4 0.8 1.0 1.2 1.6 1.8 140 100 80 60 40 0 ?20 ?40 0 10 30 40 50 60 70 80 figure 20. watchdog trigger time vs. temperature t j , temperature ( c) 140 100 80 60 20 0 ?20 ?40 16 17 19 20 22 24 25 27 v th(radj) , reset adjust threshold (v) v th(d) , reset delay thresholds (v) i d(charge), (disch) , reset delay charge / discharge current ( a) t wtt , watchdog trigger time (ms) v in = 13.5 v v out = 0.7 x v out_nom 40 120 160 1.40 1.30 v in = 13.5 v t j = 25 c 1.32 1.40 v in = 13.5 v v d = 1 v 20 120 160 20 charge current discharge current v in = 13.5 v upper threshold lower threshold 20 100 160 0.6 1.4 v in = 13.5 v v out > v rt c d = 100 nf no wdi signal 40 120 160 18 21 23 26
ncv4263?2c www. onsemi.com 9 figure 21. reset operation timing diagram v in v out v d v ro v thh(d) v thl(d) v rt 1 v v rol 1 v t t t t t rd t rd t rr t < t rr thermal shutdown input voltage dip under voltage output voltage spike overload v d v ro v wdi v thh( d) v thl( d) v rol t t t t wl t wtt t wp figure 22. watchdog operation timing diagram
ncv4263?2c www. onsemi.com 10 definitions general all measurements are performed using short pulse low duty cycle techniques to maintain junction temperature as close as possible to ambient temperature. output voltage the output voltage parameter is defined for specific temperature, input voltage and output current values or specified over line, load and temperature ranges. line regulation the change in output voltage for a change in input voltage measured for specific output current over operating ambient temperature range. load regulation the change in output voltage for a change in output current measured for specific input voltage over operating ambient temperature range. dropout voltage the input to output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. it is measured when the output drops 100 mv below its nominal value. the junction temperature, load current, and minimum input supply requirements affect the dropout level. quiescent and disable currents quiescent current (i q ) is the dif ference between the input current (measured through the ldo input pin) and the output load current. if enable pin is set to low the regulator reduces its internal bias and shuts off the output, this term is called the disable current (i dis ). current limit and short circuit current limit current limit is value of output current by which output voltage drops below 96% of its nominal value. it means that the device is capable to supply minimum 200 ma without sending reset signal to microprocessor. short circuit current limit is output current value measured with output of the regulator shorted to ground. psrr power supply rejection ratio is defined as ratio of output voltage and input voltage ripple. it is measured in decibels (db). line transient response typical output voltage overshoot and undershoot response when the input voltage is excited with a given slope. load transient response typical output voltage overshoot and undershoot response when the output current is excited with a given slope between low?load and high?load conditions. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated at typically 177 c, the regulator turns off. this feature is provided to prevent failures from accidental overheating. maximum package power dissipation the power dissipation level is maximum allowed power dissipation for particular package or power dissipation at which the junction temperature reaches its maximum operating value, whichever is lower.
ncv4263?2c www. onsemi.com 11 applications information the ncv4263?2c regulator is self?protected with internal thermal shutdown and internal current limit. t ypical characteristics are shown in figures 4 to 22. input decoupling (c in ) a ceramic or tantalum 0.1 f capacitor is recommended and should be connected close to the ncv4263?2c package. higher capacitance and lower esr will improve the overall line and load transient response. if extremely fast input voltage transients are expected then appropriate input filter is recommended to use in order to decrease rising and/or falling edges below 50 v/ s for proper operation. the filter can be composed of several capacitors in parallel. output decoupling (c out ) the ncv4263?2c is a stable component and requires a minimum equivalent series resistance (esr) for the output capacitor. stability region of esr versus output current is shown in figure 13. the minimum output decoupling value is 22 f and can be augmented to fulfill stringent load transient requirements. larger values improve noise rejection and load transient response. enable operation the enable pin will turn the regulator on or off. the threshold limits are covered in the electrical characteristics table in this data sheet. delay timing the delay timing pin is current source. current from delay t iming pin charges connected capacitor. the value of this capacitor determines the reset delay time by equation 1 and watchdog trigger time by equation 4. c d t rd_des t rd 100 nf (eq. 1) where: c d is capacitance of delay capacitor t rd_des is desired reset delay time t rd is reset delay time specified in datasheet reset operation a reset signal is provided on the reset output pin to provide feedback to the microprocessor of an out of regulation condition. the timing diagram of reset function is shown in figure 21. this is in the form of a logic signal on reset output. output voltage conditions below the reset threshold causes reset output to go low. the reset output integrity is maintained down to v out = 1.0 v. the reset output circuitry is open collector output with internal 30 k pull?up resistor. leave open this output if the reset function is not needed else an external pull?up resistor (5.6 k ) connect to the output (v out ). reset threshold is default set to 93% of nominal output voltage (v radj = 0 v). reset threshold can be varied in range of output voltage 70% v out < v rt by external resistor output voltage divider, see schematic on figure 23 and specification of reset output. ncv4263?2c gnd 100 nf radj ro wdi d i/o on off en 100 nf figure 23. application schematic with adjustable reset threshold microprocessor v in v out c in r radj1 r radj2 reset r ro 5.6 k c d c out 22 f v dd desired reset threshold is given by equation 2. v rt_des r radj1
r radj2 r radj2 v th(radj) (eq. 2) where: v rt_des is desired reset threshold r radj1 , r radj2 are resistance of resistor divider v th(radj) is reset adjust threshold specified in datasheet use r radj2 50 k to avoid significant reset threshold error due to radj bias current. watchdog operation watchdog input monitors a signal from microprocessor. this input is positive edge sensitive. the timing diagram of watchdog function is shown in figure 22. when watchdog signal is not received during w atchdog trigger time, reset output goes low for a watchdog input low time and is periodically generated with period given by equation 3. capacitance of delay capacitor for setting the desired watchdog trigger time is given by equation 4. t wp t wl
t wtt (eq. 3) c d t wtt_des t wtt 100 nf (eq. 4) where: c d is capacitance of delay capacitor t wtt_des is desired watchdog trigger time t wtt is watchdog trigger time specified in datasheet t wl is watchdog input low time t wp is watchdog input period thermal considerations as power in the ncv4263?2c increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent
ncv4263?2c www. onsemi.com 12 upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. when the ncv4263?2c has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power applications. the maximum dissipation the ncv4263?2c can handle is given by: p d(max) t j(max) t a r ja (eq. 5) since t j is not recommended to exceed 150 c, then the ncv4263?2c soldered on 645 mm 2 , 1 oz copper area, fr4 can dissipate up to 1.3 w in soic?14 package and 1.9 w in soic?8 ep package, when the ambient temperature (t a ) is 25 c. see figures 24 and 25 for r ja versus pcb area. the power dissipated by the ncv4263?2c can be calculated from the following equations: p d v in i q @i out
i out v in v out (eq. 6) or v in(max) p d(max)
v out i out i out
i q (eq. 7) hints v in and gnd printed circuit board traces should be as wide as possible. when the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. place external components, especially the output capacitor, as close as possible to the ncv4263?2c and make traces as short as possible. figure 24. thermal resistance vs. pcb copper area for soic?14 copper heat spreader area (mm 2 ) 700 500 400 200 100 0 50 70 80 100 120 140 160 r ja , thermal resistance ( c/w) 300 600 soic?14 ? 1 oz cu 60 90 110 130 150 soic?14 ? 2 oz cu figure 25. thermal resistance vs. pcb copper area for soic?8 ep copper heat spreader area (mm 2 ) 700 500 400 200 100 0 50 70 80 100 120 140 160 r ja , thermal resistance ( c/w) 300 600 soic?8 ep ? 1 oz cu 60 90 110 130 150 soic?8 ep ? 2 oz cu ordering information device output voltage marking package shipping ? ncv4263?2cd250r2g 5.0 v ncv4263?2c50g soic?14 (pb?free) 2500 / tape & reel ncv4263?2cpd50r2g 5.0 v v632c5 soic?8 ep (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncv4263?2c www. onsemi.com 13 package dimensions soic?8 ep case 751ac issue b ?? ?? h c 0.10 d e1 a d pin one 2 x 8 x seating plane exposed gauge plane 14 5 8 d c 0.10 a-b 2 x e b e c 0.10 2 x top view side view bottom view detail a end view section a?a 8 x b a-b 0.25 d c c c 0.10 c 0.20 a a2 g f 1 4 58 notes: 1. dimensions and tolerancing per asme y14.5m, 1994. 2. dimensions in millimeters (angles in degrees). 3. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the ?b? dimension at maximum material condition. 4. datums a and b to be determined at datum plane h. dim min max millimeters a 1.35 1.75 a1 0.00 0.10 a2 1.35 1.65 b 0.31 0.51 b1 0.28 0.48 c 0.17 0.25 c1 0.17 0.23 d 4.90 bsc e 6.00 bsc e 1.27 bsc l 0.40 1.27 l1 1.04 ref f 2.24 3.20 g 1.55 2.51 h 0.25 0.50 0 8 h aa detail a (b) b1 c c1 0.25 l (l1) pad e1 3.90 bsc a1 location *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* exposed pad 1.52 0.060 2.03 0.08 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 7.0 0.275 2.72 0.107
ncv4263?2c www. onsemi.com 14 package dimensions soic?14 nb case 751a?03 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of at maximum material condition. 4. dimensions d and e do not include mold protrusions. 5. maximum mold protrusion 0.15 per side. h 14 8 7 1 m 0.25 b m c h x 45 seating plane a1 a m s a m 0.25 b s c b 13x b a e d e detail a l a3 detail a dim min max min max inches millimeters d 8.55 8.75 0.337 0.344 e 3.80 4.00 0.150 0.157 a 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 l 0.40 1.25 0.016 0.049 e 1.27 bsc 0.050 bsc a3 0.19 0.25 0.008 0.010 a1 0.10 0.25 0.004 0.010 m 0 7 0 7 h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 6.50 14x 0.58 14x 1.18 1.27 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncv4263?2c/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative

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